An Optimal Partitioning Algorithm for Combinational CMOS Circuits Using Particle Swarm Optimization

This paper presents a swarm intelligence based approach to optimally partition combinational CMOS circuits for pseudoexhaustive testing. The partitioning algorithm ensures reduction in the number of test vectors required to detect faults in VLSI circuits. The algorithm is based on the circuit’s primary input cone (N) and fanout (F) values to decide the location and number of partitions. Particle Swarm Optimization (PSO) is used to determine the optimal values of N and F to minimize the number of test vectors as well as the number of partitions. The proposed algorithm has been applied to the ISCAS’85 benchmark circuits and the results obtained are compared with those from the I-PIFAN partitioning approach.